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@@ -37,6 +37,9 @@
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#include <sys/stat.h> /* fstat per mmap degli shard (COLI_MMAP) */
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#include <signal.h> /* SIGINT = stop morbido del turno in serve mode */
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#endif
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#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__))
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#include <cpuid.h> /* hwinfo_emit: CPU brand string senza /proc */
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#endif
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#include "st.h"
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#ifdef __linux__
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#include "uring.h"
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@@ -1578,6 +1581,14 @@ static void embed_row(Model *m, int tok, float *x){
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static int g_mmap=0;
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static struct { int fd; void *base; size_t len; } g_maps[512]; static int g_nmaps;
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static pthread_mutex_t g_map_mtx = PTHREAD_MUTEX_INITIALIZER; /* expert_load e' OMP-parallel */
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/* forward decls: mem_should_wire/mem_wire live near pin_wire() further down, but
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* qt_wire_mmap() (also further down, used by pin_wire()'s COLI_MMAP path) needs
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* them declared before its own definition. Real mlock-ing of mmap'd pinned
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* experts happens there, not in expert_load() -- see qt_wire_mmap() for why. */
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static int mem_should_wire(void);
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static int mem_wire(void *addr, size_t len);
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static void qt_unwire_mmap(QT *t); /* def. presso pin_wire / defined near pin_wire */
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static int64_t g_mmap_wired=0; static long g_mmap_wire_failed=0;
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static void *map_of_fd(int fd){
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pthread_mutex_lock(&g_map_mtx);
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for(int i=0;i<g_nmaps;i++) if(g_maps[i].fd==fd){ void *b=g_maps[i].base; pthread_mutex_unlock(&g_map_mtx); return b; }
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@@ -1691,6 +1702,13 @@ static int expert_load(Model *m, int layer, int eid, ESlot *s, int fatal){
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acc+=p[n-1]; (void)acc;
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char *q=(char*)bq[k]+tq[k]->off; size_t nq=(size_t)tq[k]->nbytes;
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for(size_t i=0;i<nq;i+=4096) acc+=q[i];
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/* mlock deliberately NOT done here: this fires for every expert_load call,
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* including the transient VRAM-staging pass in pin_load (host copy loaded,
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* uploaded to GPU, then "released" via expert_host_release -- which only
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* knows how to munlock s->slab, always NULL under mmap, so wiring here would
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* leak locked pages for every GPU-tier expert). See pin_wire() below: it wires
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* the final resident set only, after GPU release has already nulled out the
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* pointers for anything that isn't genuinely RAM-tier. */
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}
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s->eid=eid; return 0;
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}
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@@ -4562,6 +4580,9 @@ static void repin_pass_limit(Model *m,int limit){
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if(!qt_cuda_update(hq[k])) ok=0;
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}
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if(!ok){ fprintf(stderr,"[REPIN] refresh VRAM fallito\n"); exit(1); }
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/* promoted expert now computes from VRAM: drop its host mlock
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* (mmap path; no-op otherwise) or every swap leaks locked pages */
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qt_unwire_mmap(&hot->g); qt_unwire_mmap(&hot->u); qt_unwire_mmap(&hot->d);
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if(g_cuda_release_host) expert_host_release(m,hot);
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gpu_swaps++;
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if(getenv("REPIN_VERBOSE")) fprintf(stderr,
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@@ -5144,25 +5165,45 @@ static void ehit_mark(Model *m, int layer, int eid){
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static void hwinfo_emit(Model *m){
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Cfg *c=&m->c; (void)c; /* silence -Wunused on builds without /proc (#148 report) */
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/* CPU */
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char cpu[256]=""; FILE *ci=fopen("/proc/cpuinfo","r");
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char cpu[256]="";
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#ifdef _WIN32
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/* niente /proc su Windows: brand string via CPUID (0x80000002..4), zero
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* dipendenze extra. La dashboard mostrava "0 GB RAM / 0 cores" perche'
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* tutto questo blocco era solo-Linux mentre il ramo CUDA funzionava. */
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#if defined(__x86_64__) || defined(__i386__)
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{ unsigned int r[12]={0}; unsigned int *w=r;
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for(unsigned int f=0x80000002u; f<=0x80000004u; f++,w+=4)
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__get_cpuid(f,&w[0],&w[1],&w[2],&w[3]);
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char *b=(char*)r; b[47]=0; while(*b==' ')b++;
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snprintf(cpu,sizeof(cpu),"%s",b); }
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#endif
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#else
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FILE *ci=fopen("/proc/cpuinfo","r");
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if(ci){ char ln[256];
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while(fgets(ln,sizeof(ln),ci)) if(!strncmp(ln,"model name",10)){
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char *p=strchr(ln,':'); if(p){ p++; while(*p==' ')p++;
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int n=(int)strlen(p); if(n>0&&p[n-1]=='\n')p[--n]=0;
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snprintf(cpu,sizeof(cpu),"%s",p); } break; }
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fclose(ci); }
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#endif
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int cores=0;
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#ifdef _SC_NPROCESSORS_ONLN
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#ifdef _WIN32
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{ SYSTEM_INFO si; GetSystemInfo(&si); cores=(int)si.dwNumberOfProcessors; }
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#elif defined(_SC_NPROCESSORS_ONLN)
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cores=(int)sysconf(_SC_NPROCESSORS_ONLN);
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#endif
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/* RAM */
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double ram_total=0,ram_avail=0;
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#ifdef _WIN32
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compat_meminfo(&ram_total,&ram_avail); /* GlobalMemoryStatusEx, gia' in compat.h */
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#else
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FILE *mi=fopen("/proc/meminfo","r");
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if(mi){ char ln[256]; double mt=0,ma=0;
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while(fgets(ln,sizeof(ln),mi)){
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if(sscanf(ln,"MemTotal: %lf",&mt)==1) ram_total=mt/1e6;
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if(sscanf(ln,"MemAvailable: %lf",&ma)==1) ram_avail=ma/1e6;
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} fclose(mi); }
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#endif
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/* GPU */
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int ngpu=0; double vram_total=0;
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char gpu_name[128]="";
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@@ -5317,8 +5358,57 @@ static int mem_wire(void *addr, size_t len){
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}
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/* Inchioda tutti gli slab degli expert pinnati (pesi + scale). Non fatale se fallisce.
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* EN: wire all pinned-expert slabs (weights + scales). Non-fatal on failure. */
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/* mlock a single mmap'd QT's weight + scale ranges. Skips VRAM-tier QTs
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* (cuda_eligible): their compute runs from device memory, so wiring the host
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* mmap range would pin ~137 GB of never-touched file pages. NOTE the q8/q4
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* NULL check alone is NOT enough here: expert_host_release() early-returns
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* for mmap experts (no slab) without nulling the host pointers, so GPU-tier
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* slots keep live-looking q8/q4 forever -- that was the bug that wired 363 GB
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* instead of 231 GB and starved the kernel into page-cache thrashing.
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* wired/failed are accumulated into the caller's counters. */
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/* undo qt_wire_mmap for one QT: used when a REPIN gpu_swap promotes a wired
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* RAM-tier expert into VRAM -- without this every promotion leaks its locked
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* host range and the dead-weight lock re-grows over a long session. */
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static void qt_unwire_mmap(QT *t){
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if(!g_mmap || !mem_should_wire()) return;
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if(!t->q8 && !t->q4) return;
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int64_t scale_b=(int64_t)t->O*4;
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int64_t weight_b=qt_bytes(t)-scale_b;
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void *wp=t->q8?(void*)t->q8:(void*)t->q4;
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#if defined(__APPLE__) || defined(__linux__) || defined(__FreeBSD__)
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if(weight_b>0 && !munlock(wp,(size_t)weight_b)) g_mmap_wired-=weight_b;
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if(t->s && scale_b>0 && !munlock(t->s,(size_t)scale_b)) g_mmap_wired-=scale_b;
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#elif defined(_WIN32)
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if(weight_b>0 && !compat_munlock(wp,(size_t)weight_b)) g_mmap_wired-=weight_b;
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if(t->s && scale_b>0 && !compat_munlock(t->s,(size_t)scale_b)) g_mmap_wired-=scale_b;
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#endif
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}
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static void qt_wire_mmap(QT *t, int64_t *wired, long *failed){
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if(!t->q8 && !t->q4) return;
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if(t->cuda_eligible) return; /* resident in VRAM; host range is dead weight */
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int64_t scale_b=(int64_t)t->O*4;
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int64_t weight_b=qt_bytes(t)-scale_b;
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void *wp=t->q8?(void*)t->q8:(void*)t->q4;
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if(weight_b>0){ if(mem_wire(wp,(size_t)weight_b)==0) *wired+=weight_b; else (*failed)++; }
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if(t->s && scale_b>0){ if(mem_wire(t->s,(size_t)scale_b)==0) *wired+=scale_b; else (*failed)++; }
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}
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static void pin_wire(Model *m){
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if(!mem_should_wire()) return;
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if(g_mmap){
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/* Wire the FINAL resident set only, after pin_load's GPU-upload pass
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* has already run -- qt_wire_mmap() skips cuda_eligible (VRAM-tier)
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* slots, so only the genuinely RAM-tier experts get locked. */
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Cfg *c=&m->c; double t0=now_s();
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for(int i=0;i<c->n_layers;i++) for(int z=0;z<m->npin[i];z++){
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ESlot *s=&m->pin[i][z];
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qt_wire_mmap(&s->g,&g_mmap_wired,&g_mmap_wire_failed);
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qt_wire_mmap(&s->u,&g_mmap_wired,&g_mmap_wire_failed);
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qt_wire_mmap(&s->d,&g_mmap_wired,&g_mmap_wire_failed);
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}
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fprintf(stderr,"[PIN] mlock (mmap): %.1f GB wired in physical RAM%s in %.0fs\n",
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g_mmap_wired/1e9, g_mmap_wire_failed?" (some allocations failed -- raise: ulimit -l unlimited)":"", now_s()-t0);
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return;
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}
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Cfg *c=&m->c; double t0=now_s(); int64_t wired=0; long failed=0;
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for(int i=0;i<c->n_layers;i++) for(int z=0;z<m->npin[i];z++){
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ESlot *s=&m->pin[i][z];
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